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PMV30UN m trenchmos? ultra low level fet 1. product pro?le 1.1 description n-channel enhancement mode ?eld-effect transistor in a plastic package using trenchmos? technology. product availability: PMV30UN in sot23. 1.2 features 1.3 applications 1.4 quick reference data 2. pinning information n surface mount package n fast switching. n battery management n high-speed switches. n v ds 20 v n i d 5.7 a n p tot 1.9 w n r dson 36 m w table 1: pinning - sot23 simpli?ed outline and symbol pin description simpli?ed outline symbol 1 gate (g) sot23 2 source (s) 3 drain (d) msb003 top view 12 3 s d g mbb076 1 of 3 sales@zpsemi.com www.zpsemi.com
3. limiting values table 2: limiting values in accordance with the absolute maximum rating system (iec 60134). symbol parameter conditions min max unit v ds drain-source voltage (dc) 25 c t j 150 c - 20 v v dgr drain-gate voltage (dc) 25 c t j 150 c; r gs =20k w -20v v gs gate-source voltage (dc) - 8v i d drain current (dc) t sp =25 c; v gs = 4.5 v; figure 2 and 3 - 5.7 a t sp = 100 c; v gs = 4.5 v; figure 2 - 3.65 a i dm peak drain current t sp =25 c; pulsed; t p 10 m s; figure 3 - 23.1 a p tot total power dissipation t sp =25 c; figure 1 - 1.9 w t stg storage temperature - 55 +150 c t j junction temperature - 55 +150 c source-drain diode i s source (diode forward) current (dc) t sp =25 c - 1.6 a i sm peak source (diode forward) current t sp =25 c; pulsed; t p 10 m s - 6.4 a PMV30UN m trenchmos? ultra low level fet 2 of 3 sales@zpsemi.com www.zpsemi.com 4. characteristics table 3: characteristics t j =25 c unless otherwise speci?ed. symbol parameter conditions min typ max unit static characteristics v (br)dss drain-source breakdown voltage i d = 250 m a; v gs =0v t j =25 c 20--v t j = - 55 c 18--v v gs(th) gate-source threshold voltage i d = 1 ma; v ds =v gs ; figure 9 t j =25 c 0.45 0.7 - v t j = 150 c 0.25 0.4 - v i dss drain-source leakage current v ds =20v; v gs =0v t j =25 c --1 m a t j = 150 c - - 100 m a i gss gate-source leakage current v gs = 8 v; v ds = 0 v - 10 100 na r dson drain-source on-state resistance v gs = 4.5 v; i d =2a; figure 7 and 8 t j =25 c - 30 36 m w t j = 150 c - 48 57.6 m w v gs = 2.5 v; i d = 1.5 a; figure 7 and 8 - 3643m w v gs = 1.8 v; i d =1a; figure 7 and 8 - 4463m w dynamic characteristics q g(tot) total gate charge i d = 5 a; v dd =10v; v gs = 4.5 v; figure 13 - 7.4 - nc q gs gate-source charge - 1.2 - nc q gd gate-drain (miller) charge - 1.8 - nc c iss input capacitance v gs =0v; v ds = 20 v; f = 1 mhz; figure 11 - 460 - pf c oss output capacitance - 100 - pf c rss reverse transfer capacitance - 70 - pf t d(on) turn-on delay time v dd =10v; r l =10 w ; v gs = 4.5 v; r g =6 w -7-ns t r rise time -13-ns t d(off) turn-off delay time - 53 - ns t f fall time -13-ns source-drain diode v sd source-drain (diode forward) voltage i s = 1.7 a; v gs =0v; figure 12 - 0.81 1.2 v PMV30UN m trenchmos? ultra low level fet 3 of 3 sales@zpsemi.com www.zpsemi.com |
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